Alessandro Tempia Calvino

Alessandro Tempia Calvino

Ph.D. Candidate in Computer Science

Teaching

Teaching Assistant for Design Technologies for Integrated Systems

Graduate course, EPFL, 2023

Content

The course will present the most outstanding features of hardware compilation, as well as the techniques for optimizing logic representations and networks. The course gives a novel, uptodate view of digital circuit design. Practical sessions will teach students the use of current design tools.

Teaching Assistant for Digital System Design

Undergraduate course, EPFL, 2023

Content

The course includes:

  • abstractions in digital hardware systems, formalisms for system description
  • Basics of digital design: Boolean algebra and representations, logic gates, combinational and sequential circuits, finite state machines
  • Register-transfer-level (RTL) design: methodology translating a high-level (algorithmic) system description into control and datapath structures, foundations of synchronous digital design, timing and and timing constraints, basic architectural transformations, FPGA basics.
  • VHDL: language basics and event-driven simulation, VHDL RTL design, synthesis and verification.

Teaching Assistant for Real Time Embedded System

Graduate course, EPFL, 2022

Content

The course includes the study of models of management of an embedded system by polling, interruptions and using a real time kernel and these primitives of tasks management and synchronizations. Specialized programmable interfaces are carried out in VHDL to help with these measurements. A real time kernel is studied and used at the time of the laboratories. A system of acquisition is carried out and the gathered data transmitted by an embedded Web server. To ensure the real time acquisition and reading by the Web server, a multiprocessor system is developed and carried out on FPGA. An Accelerator makes it possible to facilitate the optimization of functions by hardware on FPGA. Cross development tools are used. Each topic is treated by a theoretical course and an associated laboratory. The laboratories are realized on a FPGA board especially developed for teaching. A real time operating system is studied and used with the laboratories.

Teaching Assistant for Design Technologies for Integrated Systems

Graduate course, EPFL, 2021

Content

The course will present the most outstanding features of hardware compilation, as well as the techniques for optimizing logic representations and networks. The course gives a novel, uptodate view of digital circuit design. Practical sessions will teach students the use of current design tools.

Teaching Assistant for Real Time Embedded System

Graduate course, EPFL, 2021

Content

The course includes the study of models of management of an embedded system by polling, interruptions and using a real time kernel and these primitives of tasks management and synchronizations. Specialized programmable interfaces are carried out in VHDL to help with these measurements. A real time kernel is studied and used at the time of the laboratories. A system of acquisition is carried out and the gathered data transmitted by an embedded Web server. To ensure the real time acquisition and reading by the Web server, a multiprocessor system is developed and carried out on FPGA. An Accelerator makes it possible to facilitate the optimization of functions by hardware on FPGA. Cross development tools are used. Each topic is treated by a theoretical course and an associated laboratory. The laboratories are realized on a FPGA board especially developed for teaching. A real time operating system is studied and used with the laboratories.